The USENIX          Association

2015 USENIX Vail Computer Elements Workshop



The USENIX Vail Computer Elements Workshop is a unique four day workshop that has been around for 44 years serving leading architects of the computer industry. This intentionally small workshop is intended to allow a lively interaction between the participants and the speakers. The agenda is 100% invited technical talks and the audience is mostly previous speakers. Past keynotes have been Seymour Cray, Gordon Moore, Burton Smith, and Ivan Sutherland.

This year marks the 45 year of the workshop. The workshop will be held June 28 - July 1, 2015 at the Christiania at Vail.



Jon Callas

This year's Keynote will be Security Post Snowden by Jon Callas Co-founder, CTO at Silent Circle and Blackphone.



Invited Talks

Cavium ThunderX Shubu Mukherjee Cavium
CHERI: A Hybrid Capability-System Architecture Robert N.M. Watson Cambridge University
An Introduction to the ARM version8(.1) 64-bit Architecture Richard Grisenthwaite ARM
quarq - an efiicient architecture for embedded Brian Kahne Freescale
REX Computing Extreme Multicore for HPC Thomas Sohmers REX Computing
unum. A unified number system that improves on IEEE John Gustafson
seL4/L4 Gernot Heiser NICTA
Nested Kernel: An Operating System Architecture for Intra-Kernel Privilege Separation Nathan Dautenhahn UIUC
Internet of Things security Ankur Taly Google
Stoke: A stochastic optimizer for the x86_64 instruction set Berkeley Churchill Stanford
Weaver, a self timed, testable crossbar switch Ivan Sutherland Portland State
Quantum Computing on Classical Computer ArunĀ  Majumdar Kyndi
Data Anlytics for an IOT connected world Snehal Antani Splunk (CTO)
HSA (Heterogeneous System Architecture) Evaluation Seiji Maeda Toshiba
SoC for ADAS Toru Sano Toshiba
8K DTV Technology Mitsuo Ikeda NTT
Trends in datacenter architectures Mike McGrath Intel
Storage for Virtualized Workloads Jim Pinkerton Microsoft
Roadmap and Interface Challenges for SCM Mike Ignatowski AMD
Memory at the end of the roadmap: the outlook for DRAM, Flash, and the Emerging Memories Gary Bronner Rambus
Benefits of emerging memory technologies for big data and analytics Foltin Martin HP
Big Data Brian Hirano Oracle
Integrating living cells with CMOS electronics for next generation biosensing. Hua Wang Georgia Institute of Technology



The workshop is "all inclusive". The workshop fee covers the event, housing and all food from dinner Sunday through lunch Wednesday. Fees will be:

  Early Late
after June 7
Usenix Members $950 $1,050
Non-members $1,050 $1,150



Registration is open! Registration fees include the workshop, lodging and meals. The prices increase by $100 on June 7th.

Purchase your ticket now.


The workshop has been held since 1974 and some of the past workshops are available online.

The executive committee can be found here.